Pen-Chung Yew

 

Professor

Department of Computer Science and Engineering

University of Minnesota at Twin Cities

4-192 Keller Hall

200 Union Street, SE

Minneapolis, MN 55455, USA

Contact: <yew> {at} cs [dot] umn [dot] edu

Education

Ph.D. 1981

   University of Illinois at Urbana-Champaign, Computer Science.

M.S. 1977

†† University of Massachusetts at Amherst, Computer Engineering

B.S. 1975

†† National Taiwan University, Electrical Engineering

 

Current Research Interests

My research interests include computer architecture and compilers targeting future generations of high-performance and low-power multi- and many-core systems. Areas of focus include: high-performance memory systems, retargetable dynamic binary translation and system virtualization, parallel program debugging and testing, and parallel simulation techniques

 

Recent Publications (Past 5 years, updated 10/1/2014)

Computer Architectures

      A. Holey, V. Mekkat, P.C. Yew, A. Zhai, Performance-Energy Considerations for Shared Cache Management in a Heterogeneous Multicore Processor, to appear in ACM Transactions on Architecture and Code Optimization (TACO), 2014

      J. Li, D. Xu, C. Wu, P.C. Yew, J. Li, and Z. Wang, FPS: A Fair-progress Process Scheduling Policy on Shared-Memory Multiprocessors, to appear in IEEE Transactions on Parallel and Distributed Systems (TPDS), 2014

      F. Lv, H.M. Cui, L. Wang, L. Liu, C.G. Wu, X.B. Feng and P.C. Yew, Dynamic I/O-Aware Scheduling for Batch-Mode Applications on Chip Multiprocessor Systems of Cluster Platform, J. of Computer Science and Technology (JCSE), 29(1): 21-37, 2014

      C.F. Chen, C.C. Chen, et al, DAPs: Dynamic Adjustment and Partial Sampling for Multithreaded/Multicore Simulation, Proc. of 51th International Design Automation Conference (DAC), June 2014

      S.H. Chen, S.M. Lin, K.Y. Chen, Y.H. Chang, P.C. Yew, C.C. Ho, A Systematic Methodology for OS Benchmarks Characterization, Proc. of ACM Intíl Conf. on Reliable and Convergent Systems (RACS), October 2013

      V. Mekkat, A. Holey, P.C. Yew and A. Zhai, Managing Last-Level Cache in a Heterogeneous Multicore Processor, Proc. of Int'l Conf. on Parallel Architectures and Compiler Techniques (PACT), September 2013.

      D. Xu, C. Wu, P.C. Yew, J. Li, and Z. Wang, Providing Fairness on Shared Memory Multiprocessors via Process Scheduling, ACM SIGMETRICS Performance, June 2012

      D. Xu, C. Wu and P.C. Yew, On Mitigating Memory Bandwidth Contention Through Bandwidth-Aware Scheduling, Proc. of Int'l Conf. on Parallel Architectures and Compiler Techniques (PACT), September 2010.

       Y. Duan, X. Feng, P.C. Yew, Detecting and Eliminating Violation of Sequential Consistency for Concurrent C/C++ Programs, Proc. ofIEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO), March 2009

 

Dynamic Binary Translation (DBT) and System Virtualization

      Y.H. Lu, D.Y. Hong, T.Y. Wu, J.J. Wu, P. Liu, W.C. Hsu, and P.C. Yew, DBILL: An Efficient and Retargetable Dynamic Binary Instrumentation Framework using LLVM Backend, Proc. of 10th Int'l Conf. on Virtual Execution Environments (VEE), March 2014

      C.R. Chang, J.J. Wu, P. Liu, W.C. Hsu, and P.C. Yew, Efficient Memory Virtualization for Cross-ISA System Mode Emulation, Proc. of 10th Int'l Conf. on Virtual Execution Environments (VEE), March 2014

      D.Y. Hong, J.J. Wu, P.C. Yew, W.C. Hsu, C.C. Hsu, P. Liu, C.M. Wang and Y.C. Chung, Efficient and Retargetable Dynamic Binary Translation on Multicores, IEEE Transactions on Parallel and Distributed Systems (TPDS), March 2014

       C.C. Hsu, J.J. Wu, P.C. Yew, D.Y. Hong, C.M. Wang, and W.C. Hsu, Improving Dynamic Binary Optimization Through Early-Exit Guided Code Region Formation, 9th Int'l Conf on Virtual Execution Environments (VEE), March 2013

      H. Chen, R. Chen, F. Zhang, B. Zang and P.C. Yew, Mercury: combining performance with dependability using self-virtualization, Journal of Computer Science and Technology (JCST), 2012.

      D.Y. Hong, C.C. Hsu, P.C. Yew, J.J. Wu, W.C. Hsu, Y.C. Chung, P. Liu and C.M. Wang, HQEMU: A Multi-Threaded and Retargetable Dynamic Binary Translator on Multicores, Proc. of the 10th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO), March, 2012

      H. Chen, J. Wu, C. Huang, P.C. Yew and B. Zang, Dynamic Software Updating Using a Relaxed Consistency Model, IEEE Trans. on Software Engineering (TSE), Vol. 37, No. 5, Sept/Oct 2011, pp. 679-694

      C.C. Hsu, P. Liu, C.M. Wang, J.J. Wu, D.Y. Hong, P.C. Yew and W.C. Hsu, LnQ: Building High Performance Dynamic Binary Translators with Existing Compiler Backends, Proc. of the 40th International Conference on Parallel Processing (ICPP), Taipei, Taiwan,September 2011

 

Compiler Optimization

      S. Mehta, G. Beeraka and P.C. Yew, Tile Size Selection Revisited, to appear in ACM Transactions on Architecture and Code Optimization (TACO), 2014

      S. Mehta, Z. Fang, A. Zhai and P.C. Yew, Multistage Coordinated Prefetching for Present-Day Processors, Proc. of the 2014 Int't Conf. on Supercomputing (ICS), June 2014

      S. Mehta, P.H. Lin, and P.C. Yew, Revisiting Loop Fusion in the Polyhedral Framework, Proc. of ACM SIGPLAN 19th Annual Symp. on Principles and Practice of Parallel Programming (Ppopp), February 2014

      L. Gao, L. Li, J.L. Xue and P.C. Yew, SEED: A Statically-Greedy and Dynamically-Adaptive Approach for Speculative Loop Execution, IEEE Transaction on Computers (TC), Vol. 62, No. 5, May 2013, pp. 1004-1016

      S.Y. Wang, P.C. Yew and A. Zhai, Code Transformations for Enhancing the Performance of Speculatively Parallel Threads, J. of Circuits, Systems and Computers (JCSC), No. 2, Vol. 21, 2012

      Z. Wang, C. Wu, P.C. Yew, J.J. Li and X. Di, On-the-Fly Structure Splitting for Heap Objects, ACM Transactions on Architecture and Code Optimization (TACO), January 2012

       P.H. Lin, J. Jayaraj, P. Woodward, and P.C. Yew, A Study of Performance Portability Using Piecewise-Parabolic Method (PPM) Gas Dynamics Applications, Proc. of Intíl Conf. on Computational Science (ICCS), May 2012

      P. Woodward, et al, Boosting the Performance of Computational Fluid Dynamics Codes for Interactive Supercomputing, Proc. Of Intíl Conf. on Computational Science (ICCS), May 2010

      J. Lin and P.C. Yew, A Compiler Framework for General Memory Layout Optimization Targeting Structures and Arrays, The 12th Annual Workshop on the Interaction between Compilers and Computer Architecture (INTERACT), March 2010.

      Z. Wang, C. Wu and P.C. Yew, On Improving Heap Memory Layout by Dynamic Pool Allocation, Proc. of the 8th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO), April, 2010.

      L. Wang, et. al., An Adaptive Task Creation Strategy for Work-Stealing Scheduling, Proc. of the 8th Annual IEEE/ACM Int'l Symp. on Code Generation and Optimization (CGO), April, 2010.

       V. Packirisamy, A. Zhai, W.C. Hsu, T.F. Ngai, P.C. Yew, Exploring Speculative Parallelism in SPEC2006, Proc. of IEEE Intíl Symp. On Performance Analysis of Systems and Software (ISPASS), April 2009

 

 

Parallel Program Debugging and Testing

      W. Wang, C. Wu, P.C. Yew, X. Shen, X. Yuan, Z. Wang, J. Li, X. Feng, Concurrency Bugs Localization Using Shared Memory Access Pairs, 29th IEEE/ACM International Conference on Automated Software Engineering (ASE), September 2014

      X. Yuan, C. Wu, P.C. Yew, W. Wang, Z. Wang, J. Li and D. Xu, Synchronization Identification through On-the-Fly Test, Proc. of 2013 Euro-Par Conference (Euro-Par), August 2013

      H. Chen, L. Yuan, X. Wu, B. Zang, B. Huang, P.C. Yew, Control Flow Obfuscation with Information Flow Tracking, Proc. of the 42nd Int'l Symp. on Microarchitecture (MICRO-42), November 2009

Complete Publication List (UMN List)

Professional Activities

PhD Students

 

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