Wei Chung Hsu
Professor
Publications and Patents
Publications
- Jiunn-Yeu Chen, Wuu Yang, Tzu-Han Hung, Charlie Su, Wei-Chung Hsu, "On Static Binary Translation and Optimization for ARM based Applications", ODES-6 (ODES: Workshop on Optimizations for DSP and Embedded Systems, held with CGO 2008), April, 2008
- Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Wei-Chung Hsu, Pen-Chung Yew " Analysis of Statistical Sampling in Microarchitecture Simulation: Metric, Methodology and Program Characterization", 2007 IEEE International Symposium on Workload Characterization, September 2007
- Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, " COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications", The 2007 International Conference on Parallel Processing (ICPP-07), September 2007.
- Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, Sreekumar R. Nair, Robert Y. Geva, " Entropy-based Profile Characterization and Classification for Automatic Profile Management", The 12th Asia-Pacific Computer Systems Architecture Conference, August 2007.
- Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Douglas Hawkins, Wei-Chung Hsu, Pen-Chung Yew, "CIM: A Reliable Metric for Evaluating Program Phase Classifications", IEEE Computer Architecture Letters, vol. 6, no. 1, Jan-Jun, 2007
- Peng-fei Chuang, Howard Chen, Gerolf F. Hoflehner, Daniel M. Lavery, and Wei-Chung Hsu, "Dynamic Profile Driven Code Version Selection", The 11th Annual Workshop on the Interaction between Compilers and Computer Architecture, 2007
- Rao Fu, Antonia Zhai, Pen-Chung Yew and Wei-Chung Hsu, Jiwei Lu, " Reducing Queuing Stalls Caused By Data Prefetching", The 11th Annual Workshop on the Interaction between Compilers and Computer Architecture, 2007.
- Venkatesan Packirisamy, Shengyue Wang, Antonia Zhai, Wei-Chung Hsu
and Pen-Chung Yew "Supporting Speculative Multithreading on Simultaneous Multithreaded Processors" 13th Annual IEEE International Conference on High Performance Computing (HiPC 2006), December, 2006
- Rao Fu, Jiwei Lu, Anotonia Zhai, and Wei-Chung Hsu "A Study of the Performance Potential for Dynamic Instruction Hints Selection" 11th Asia-Pacific Computer Systems Architecture Conference (ACSAC 2006), September 6-8, 2006. (Also published in "Advances in Computer Systems Architecture", Lecture Notes in Computer Science , Vol. 4186, Springer, ISBN: 3-540-40056-7)
- Abhinav Das, Anotonia Zhai, Rao Fu, and Wei-Chung Hsu "Issues and Support for Dynamic Register Allocation" 11th Asia-Pacific Computer Systems Architecture Conference (ACSAC 2006), September 6-8, 2006 (Also published in "Advances in Computer Systems Architecture", Lecture Notes in Computer Science , Vol. 4186, Springer, ISBN: 3-540-40056-7)
- Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Roy Ju, and T. Ngai,
"Recovery Code Generation for General Speculative Optimizations", ACM Transcation on Architecture and Code Optimization (TACO), Volume 3, Issue 1, March, 2006.
- Abhinav Das, Jiwei Lu, Wei-Chung Hsu, "Region Monitoring for Local Phase Detection in Dynamic Optimization Systems", Proceedings of the
Fourth Annual IEEE/ACM International Symposium on Code Generation and Optimization, March 2006.
- Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Santosh Abraham, "Dynamic Helper Threaded Prefetching
on the SUN Ultra SPARC CMP Processor", in Proceedings of the 38th Annual IEEE/ACM International Symposium on
Microarchitecture, (Micro-38), Nov., 2005
- Jimpyo Kim, Sreekumar Kodakara, Wei-Chung Hsu, David Lilja and Pen-Chung Yew,
"Dynamic Code Region (DCR)-based Programm Phase Tracking and Prediction for Dynamic Optimizations" in
Proceedings of the First High Performance Embedded Architecture and Compilers, HiPEAC2005, Nov., 2005.
- Abhinav Das, Jiwei Lu, Howard Chen, JinPyo Kim, Wei-Chung Hsu, Pen-Chung Yew, and Dong-Yuen Chen "Performance of Runtime Optimization on BLAST" 2005 International Symposium on Code Generation and Optimization (CGO), March 20-25, San Jose, 2005
- Xiao Dai, Wei-Chung Hsu, Antonia Zhai, Pen-Chung Yew, "A General Compiler Framework for RSpeculative Optimization Using Data Speculative Code Motion" 2005 International Symposium on Code Generation and Optimization (CGO), March 20-25, San Jose, 2005
- Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook. Ngai. "A Compiler Framework for Recovery Code Generation in General Speculative Optimizations" In Proceedings of International Conference on Parallel Architectures and Compilation Techniques, Oct, 2004
- Jin Lin, Wei-Chung Hsu, Pen-Chung Yew, Compilation and Speculation, chapter 12 in Speculative Execution in High Performance Computer Architectures, http://www.ece.neu.edu/groups/nucar/CRCBook/, 2004
- Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan, "A compiler framework for speculative optimizations", ACM Transactions on Architecture and Code Optimization (TACO), Volume 1 , Issue 3, (September 2004)
- Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Yew "Continuous Adaptive Object-Code Re-optimization Framework" Ninth Asia-Pacific Computer Systems Architecture Conference (ACSAC 2004), pp. 241 - 255
- Jiwei Lu, Howard Chen, Pen-Chung Yew, Wei Chung Hsu, "Design and Implementation of a Lightweight Dynamic Optimization System" in the Journal of Instruction-Level Parallelism, Volume 6, 2004
- Jin Lin, Tong Chen, Wei Hsu, Pen-Chung Yew, "On Speculative Optimizations Using Alias Profiling and Heuristics for C Programs ", EPIC-3 Workshop, held with CGO-2004, March, 2004
- Tong Chen, Jin Lin, Wei Hsu, Pen-Chung Yew, "Data Dependence Profiling for Speculative Optimizations" to appear in Proceedings of the 13th International Conference on Compiler Construction (CC), March, Barcelona, Spain, 2004.
- Jiwei Lu, Howard Chen, Rao Fu, Wei Hsu, Pen-Chung Yew, D. Chen "The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System" in Proceedings of the 36th Annual IEEE/ACM International Symposium on Microarchitecture, San Diego, California, Dec. 3-5, 2003,
- Jin Lin, Tong Chen, Wei Hsu, Pen-Chung Yew, Roy Ju "A Compiler Framework for Speculative Analysis and Optimizations" in Proceedings of the SIGPLAN'03 Conference on Programming Language Design and Implementation, San Diego, June, 2003
- Howard Chen, Wei-Chung Hsu, Jiwei Lu,Pen-Chung Yew,Dong-Yuan Chen "Dynamic Trace Selection Using Performance Monitoring Hardware Sampling", Proceedings of First Annual IEEE/ACM International Symposium on Code Generation and Optimization, March, 2003
- Jin Lin, Tong Chen, Wei-Chung Hsu and Pen-Chung Yew "Speculative Register Promotion Using Advanced Load Address Table (ALAT)" Proceedings of First Annual IEEE/ACM International Symposium on Code Generation and Optimization, March, 2003
- Tong Chen, Jin Lin, Wei Hsu, Pen-Chung Yew, "An Empirical Study on the Granularity of Pointer Analysis in C Programs", Proceedings of 15th Work shop on Languages and Compilers for Parallel Computing (LCPC'02), July, 2002.
- Wei C. Hsu, Howard Chen, Pen Yew, D-Y. Chen, "On the Predictability of Program Behavior Using Different Input Data Sets" Workshop on interaction between compilers and computer architectures, (INTERACT-6) held with HPCA-8, Feb., 2002
- Tong Chen, Jin Lin, Wei C. Hsu, Pen Yew, "On the Impact of Naming Methods for Heap-Oriented Pointers in C Programs", The Sixth International Symposium on Parallel Architectures, Algorithms,and Networks, May, 2002
- Wei C. Hsu, Howard Chen, Pen Yew, D-Y. Chen, "Phase Locality Detection and Exploitation Using Branch Trace Buffer in the IA-64 Architecture" TR-02-006, Department of Computer Science, University of Minnesota, 2002.
- Wei Chung Hsu and Jim Smith, "Instruction Cache Prefetching for Pipelined
Processors", IEEE Transaction on Computers, May, 1998.
- Vatsa Santhenam, Eddie Gornish, and Wei Chung Hsu, "Data Prefetch in the HP-PA8000",
Proceedings of the International Symposium on Computer Architecture,
ISCA'97 , June, 1997.
- Steven P. Vander Wiel, David J. Lilja and Wei Chung Hsu, "When Caches Aren't Enough:
Data Prefetching Techniques", side bar, IEEE Computer, July, 1997, Volume 30.
- Bill Blume and Wei Chung Hsu, "FMAC Code Optimization Issues", Workshop on
interaction between compilers and computer architectures, International
Symposium on High Performance Computer Architecture, HPCA-3, Feb., 1997,
Also published on TCCA Newsletter, June, 1997.
- Dave Dunn and Wei Chung Hsu, "Instruction Scheduling for the HP-PA8000", Proceedings
of the 29th Annual International Symposium on MicroArchitecture, Micro-29,
Dec., 1996.
- Wei Chung Hsu, "Data Prefetch in PA7200 and PA8000", Workshop on interaction between
compilers and computer architectures, the 2nd International Symposium on
High Performance Computer Architecture (HPCA-2), Feb., 1996.
- Sriram Vayapeyam and Wei Chung Hsu, "Towards Efficient Scalar Hardware for Highly
Vectorizable Applications", Journal of Parallel and Distributed Systems,
Special issue on Performance of Supercomputers., Oct., 1993.
- Wei Chung Hsu and Jim Smith, "Performance of Cached DRAM in Vector
Supercomputers", Proceedings of the International Symposium on Computer
Architecture, ISCA'93 , 1993.
- Sriram Vayapeyam and Wei Chung Hsu, "On the Instruction-Level Characteristics of
Inherently Scalar Code in Highly-Vectorized Scientific Applications",
Proceedings of the 25th Annual International Symposium on MicroArchitecture,
Micro-25, 1992. (2nd best presentation)
- Jim Smith and Wei Chung Hsu, "Prefetching in Supercomputer Instruction Caches",
Supercomputing'92, Nov., 1992.
- Wei Chung Hsu, "On Memory Coherency in Parallel Processing", Proceedings of the
14th Modern Engineering and Technology Symposium, 1992.
- Sriram Vajapeyam, Wei Chung Hsu and Guri Sohi, "An Empirical Study of the Cray Y-
MP processor using the Perfect Club Benchmarks", Proceedings of the
International Symposium on Computer Architecture, ISCA'91 , 1991.
- Sriram Vajapeyam, Guri Sohi, and Wei Chung Hsu, "Exploitation of Instruction-Level
Parallelism in a Cray X-MP processor", Proceedings of the International
Conference on Computer Design, ICCD'90, 1990.
- Guri Sohi and Wei Chung Hsu, "The Use of Intermediate Memories for Low-Latency
Memory Access in Supercomputer Scalar Units", The Journal of Supercomputing,
4, 1990.
- Jim Smith, Wei Chung Hsu and C. Hsiung, "Future General Purpose Supercomputer
Architecture", Supercomputing'90, 1990.
- Wei Chung Hsu, "Aspects of Cache Memories for Cray Computers", Cray Technical
Symposium, 1990.
- Wei Chung Hsu, C. Fischer and J. Goodman, "On the Minimization of Loads/Stores in
Local Register Allocation", IEEE Transactions on Software Engineering, Oct.
1989.
- J. Goodman and Wei Chung Hsu, "Code Scheduling and Register Allocation in Large
Basic Blocks" the International Conference on Supercomputing, ICS'88, 1988.
- Wei Chung Hsu, "Register Allocation and Code Scheduling for Load/Store
Architectures" University of Wisconsin Computer Science Technical Report #722,
Oct. 1987.
- A. Pleszkun, J. Goodman, Wei Chung Hsu, ate. al., "WISQ: A Restartable
Architecture Using Queues" International Symposium on Computer
Architectures, ISCA'87 , 1987.
- J. Goodman and Wei Chung Hsu, "On the Use of Registers vs. Cache to Minimize
Memory Traffic", International Symposium on Computer Architectures, ISCA'86 ,
1986.
- Wei Chung Hsu, "Register Allocation for VLSI Processors", University of Wisconsin
Computer Science Technical Report #619, 1985
Patents
- Wei Chung Hsu, Anne Holler, and Eddie Gornish "Method of Prefetching Data for References With Multiple Stride Directions", US Patent 5,752,037, June 1998
- Wei Chung Hsu, "Method and System For Optimizing Code", US patent, 5,901,318, 1999
- Wei Chung Hsu and Loren Staley, "Optimizing Compiler Having Data Cache Prefetch Spreading", US Patent, 5,854,934, 1999
- Wei Chung Hsu, "Array Padding for Higher Memory Throughput in the Presence of Dirty Misses" US Patent, 6,041,393. 1999
- Wei Chung Hsu and Ricky Benitez, "System and Method Using A Hardware-Embedded Run-time Optimizer", US Patent, 6,453,411, 2002
- Wei Chung Hsu and Ricky Benitez, "Efficient Mapping to Optimized Code for Processor Embedded Run-Time Optimizer", US Patent, 6,185,669, 2001
- Wei Chung Hsu and Ricky Benitez, "Hardware/software system for instruction profiling and trace selection using branch history information for branch predictions ", US Patent, 6,418,530, 2002
- Wei Chung Hsu and Lacky Shah, "System and Method Using Text Patching for Run-Time Optimization", US Patent, 6,295,644, 2001