Wei Chung Hsu
Professor, University of Minnesota
Computer Science Department
4-192 EE/CSCI Bldg.
200 Union Street SE
University of Minnesota
Minneapolis, MN, USA, 55455
(612) 625-2013
(612) 625-0572 [fax]
hsu@cs.umn.edu
Teaching
Fall-2006: CSci 4203: Computer Architecture and Csci 8970: CSE Colloquium
Spring-2006: CSci 5161: Introduction to Compilers
Fall-2005: CSci 4203: Computer Architecture (syllabus)
Fall-2003: CSci 8161: Advanced Compiler Techniques (syllabus)
Fall-2002: CSci 2021: Machine Organization and Architecture (syllabus)
Spring-2002: CSci 2021: Machine Organization and Architecture (syllabus)
Fall-2001: CSci 5161: Introduction to Compilers (syllabus)
Spring-2001: CSci 8980: Dynamic Binary Translation and Optimization
(syllabus) (course web site) (reading list)
Fall-2000: CSci 5161: Introduction to Compilers (syllabus)
Education
Ph.D., University of Wisconsin at Madison, Computer Sciences
M.S., National Chiao-Tung University, Computer Engineering
B.S., National Chiao-Tung University, Computer Science
Professional Background
2006- Professor, Department of CS/E, University of Minnesota at Twin-Cities
2004-2005 Visiting Professor, Sun MicroSystem
1999-2006 Associate Professor, Department of CS/E, University of Minnesota at Twin-Cities
1997-1999, Runtime Optimization Architect, Hewlett-Packard Company
1993-1997, Technical Contributor, Hewlett-Packard Company
1990-1993, Computer Architect, Cray Research
1987-1990, Senior Software Engineer, Cray Research
Research Interests
Dynamic Binary Optimization Systems
High-Performance Microprocessor Architectures
Optimizing Compilers
Static/Dynamic Binary Translation Systems
Current Research Efforts
My main research effort will be on the design and implementation of
runtime optimization systems. Compiler optimization plays a critical role
in delivering high performance on modern microprocessors. However,
recent trends in software technology have increased the obstacles to effective
static compiler optimization. Runtime optimization systems use runtime feedback
information, via various profiling techniques, to identify hot code fragment
for performance improvement. Dynamic and adaptive optimizations hold a promise to
be a more effective performance delivery mechanism for future microprocessors.
Such systems will be based on runtime profiling, binary translation, trace
selection and various prediction technologies.
CV:
Research Project:
Publications and Patents
Upward Links